Integrated circuit chip manufacturers fabricate semiconductor devices using wafers of a semiconductor material such as silicon. In fabricating a semiconductor device, it is essential to minimize incorporation of unwanted impurities and crystal damage into the semiconductor substrate. In silicon integrated circuit chip manufacturing process, manufacturers purposefully dope the pure semiconductor substrate with elements such as boron or phosphorus to form current rectifying semiconductor junctions and to permit the wafer to conduct an electric current.
To insure that the semiconductor wafers possess and maintain necessary substrate purity during the device manufacturing sequence, part of the manufacturing process is to clean the surfaces of the semiconductor wafers to remove any unwanted organic, metallic, or native oxide contaminants. Moreover, some fabrication process techniques, such as reactive-ion etching (RIE) and electron-beam or X-ray lithography, can cause damage to the crystal lattice on the surface and in the bulk of semiconductor wafers. Various processes, such as RIE and ion implantation, may also introduce metallic contaminants into semiconductor wafers. The introduction of lattice damage and metallic contaminants degrade device performance and long-term reliability. The device performance degradations caused by lattice damage and metallic impurities include excessive electrical current leakage in rectifying semiconductor PN junctions and poor transistor gain.
Known methods for cleaning semiconductor wafers to remove metallic, organic and native oxide contaminants entail placing the semiconductor wafers in a dry cleaning reactor to remove these contaminants. These reactors are typically vacuum tight chambers, such as those called automatic vacuum processors (AVPs). In an AVP, the semiconductor wafer normally rests face downward (or upward) on support pins. During the process, a lamp or some other heat source, such as a heating susceptor, raises the wafer temperature to cause the wafer to react with cleaning gases or vapors. The cleaning gases expunge impurities from the surface and from within the bulk of the semiconductor wafer.
The presence of metallic impurities and crystal lattice damage on the surface and in the bulk of a semiconductor wafer can be detected as a reduction of the excess minority carrier lifetime in the semiconductor substrate. This phenomenon is caused by generation of various trap-related deep energy levels into the forbidden gap of the semiconductor energy band which facilitate or enhance the recombination of excess carriers between conduction band and valence band.
Conventional methods of measuring substrate carrier lifetime include measuring the wafer off-line after a fabrication process ends. Thence, the manufacturer removes the semiconductor wafer from the processing chamber to directly measure whether the substrate quality as specified by minority carrier lifetime meets the necessary physical specifications for its design application. Such methods of determining semiconductor substrate purity and quality, therefore, both are non-real-time and ex situ. y)An example of a technique used for substrate minority carrier lifetime measurement is the pulsed capacitance-voltage (C-V) measurement method. This type of measurement requires fabrication of metal-oxide-semiconductor (MOS) devices on semiconductor substrate and only provides the minority-carrier lifetime for the near-surface region. Therefore, these non-real-time ex-situ measurements method have little real-time process control and equipment diagnostic value to the manufacturer.
To determine accurately the semiconductor substrate crystal quality and purity in situ and during a device fabrication process sequence can significantly improve the ability to produce semiconductor devices having desirable performance and reliability characteristics. Similarly, and in the case of silicon wafers containing dopants, to know the level of doping and substrate lifetime during a device fabrication process step such as dry cleaning can ensure that the process step proceeds properly. A need exists, consequently, for a method and apparatus for making in-situ semiconductor wafer substrate lifetime, doping level, and temperature measurements during a wafer processing step.
GROVE, PHYSICS AND TECHNOLOGY OF SEMIC Devices, pp. 140-145, and YOUNG, FUNDAMENTALS OF SEMICONDUCTOR DEVICES, pp. 32-41, discuss the nonequilibrium generation and recombination characteristics of free carriers in semiconductors and the relationships between the lifetime of free excess minority charge carriers such as electrons or holes in silicon and the presence of impurities and substrate crystal lattice damage. Impurities include presence of various unwanted contaminants such as metal atoms. External affects include electron beam, x-ray, or deep ultraviolet light irradiation damage and surface states. These references explain that the presence of impurities and the injection of radiation, for example, photon irradiation, can materially change the transient electrical conductivity properties of semiconductor materials.
Young, in particular, shows the physical meaning of carrier lifetime by explaining the transient conductivity response of a piece of silicon to the initial presence and subsequent rapid removal of photon energy from the surface of a silicon substrate. YOUNG, pp. 39-41. That experiment shows that upon a sudden illumination of photon energy (with incident photon energies higher than the semiconductor bandgap energy of 1.1 eV for silicon) the silicon conductivity rapidly increases to a higher level due to generation of excess electron-hole pairs in the substrate. Upon a sudden removal of the photon energy, the substrate conductivity decays to its original thermal equilibrium level. The rate of transient conductivity decay of the silicon depends on the carrier lifetime.
If a non-invasive apparatus and system existed that could measure the conductivity decay and minority carrier lifetime in situ within a semiconductor processing reactor, then such a system could determine the presence of metallic impurities or other external affects such as irradiation damage during a fabrication process. A good example of an application is a dry cleaning reactor (such as a photochemical reactor for removal of metallic/organic/native oxide contaminants) where a noninvasive minority carrier lifetime sensor can be used (either in the vacuum load-lock or in the cleaning process chamber) to monitor the effectiveness of the cleaning processes.
Thus, there is the need for an apparatus and system that can measure semiconductor substrate conductivity and minority carrier lifetime for the purpose of determining substrate purity and quality, doping level, as well as temperature during a semiconductor device fabrication process.